module alu_decoder(
    input               op5,
    input       [2:0]   funct3,
    input               funct7_5,
    input       [1:0]   alu_op,

    output  reg [2:0]   alu_control
);

always @(*) begin
    case(alu_op)
    2'b00:
        alu_control = 3'b000;   //Add
    2'b01:
        alu_control = 3'b001;   //Subtract
    2'b10: begin                //R-type
        case(funct3)
        3'b000: begin
            if({op5,funct7_5}==2'b11)
                alu_control = 3'b001;   //Subtract
            else
                alu_control = 3'b000;   //Add
        end
        3'b010: alu_control = 3'b101;   //SLT
        3'b110: alu_control = 3'b011;   //OR
        3'b111: alu_control = 3'b010;   //AND
        3'b100: alu_control = 3'b100;   //XOR
        default:alu_control = 3'b000;   //Add
        endcase
    end
    default: alu_control = 3'b000;  //Add
    endcase
end

endmodule
